SYCL (pronounced ‘sickle’) is a royalty-free standard from the Khronos group for a cross-platform abstraction layer that builds on the underlying concepts, portability and efficiency of OpenCL. It enables code for heterogeneous processors to be written in a “single-source” style using completely standard C++ (https://www.khronos.org/sycl/). Multiple SYCL implementation exist today (from Intel, Codeplay, and LLVM) and support Intel, NVIDIA and AMD hardware.
DPC++ (Data Parallel C++) is an Intel open-source implementation of SYCL. In addition to full support of the SYCL standard, DPC++ includes additional capabilities including unified shared memory and reduction operations, which could be incorporated into future versions of the SYCL language. The major DPC++ extensions are shown in the table below. The DPC++ compiler is a part of the Intel OneAPI Base Toolkit. For high-level description of oneAPI, see the Programming Guide. A DPC++ implementation is available for NVDIA GPU’s.
| Extensions | Description |
| Unified Shared Memory(USM) | Defines pointer-based memory accesses and management interfaces. |
| In-order queues | Defines simple in-order semantics for queues, to simplify common coding patterns |
| Reduction | Provides reduction abstraction to the ND-range form of Parallel_for clause |
| Optional lambda name | Removes requirement to manually name lambdas that define kernels |
| Subgroups | Defines a grouping of work-items within a work-group |
| Data flow pipes | Enables efficient First-In, First-Out (FIFO) communication (FPGA-only) |
To assist in migrating CUDA applications to modern C++ that incorporates portable industry standard SYCL, Intel provides DPC++ Compatibility tool, dpct. For simple CUDA programs, the conversion of a CUDA source file to DPC++ can be as simple as running the conversion tool on the CUDA source file.
Resources
- Intel has first four chapters of the book “Data Parallel C++: Mastering DPC++ for Programming Heterogeneous Systems Using C++ and SYCL” and the preview of the first four chapters and the accompanying code samples are available for downloading here.
- DPC++ sample codes located in the Intel space on GitHub outline the basic structure of the SYCL programming model.
- Codeplay provides additional documentation accompanied by examples to assist in CUDA to SYCL migration.
- Argonne Leadership Computing Facility has created a set of examples available for download at https://github.com/alcf-perfengr/sycltrain.