An affine loop transformation framework for automatic parallelization

Event Sponsor: 
Mathematics and Computer Science Division
Start Date: 
Jun 23 2008 (All day)
Building/Room: 
Building 221 Conference Room A216
Location: 
Argonne National Laboratory
Speaker(s): 
P. (Saday) Sadayappan
Speaker(s) Title: 
Professor of Computer Science and Engineering, Ohio State University
Host: 
Boyana Norris

Automatic parallelization of sequential programs has been a long sought goal. Although automatic parallelization is an option currently available with many commercial compilers, it does not find widespread use in practice due to limited effectiveness. However, recent advances in compiler optimization make automatic parallelization very promising for the class of affine loop computations. Using a
polyhedral model for loop transformations, a unified tiling framework for parallelism and data locality optimization has been developed. For imperfectly nested lops with affine access functions and loop bounds, the approach can find good tiling hyperplanes for parallelization as well as data locality optimization. An automatic tool for transformation of input sequential C/Fortran code to tiled, parallel
OpenMP code has been developed.

This talk will describe the developed framework and present performance data on a number of affine computational kernels for multicore targets. Ongoing work on automatic parallelization for GPUs will also be discussed.

Short Bio: P. (Saday) Sadayappan is a Professor of Computer Science and Engineering at the Ohio State University. His research centers
around programming models, compilers and runtime systems for parallel computing, with special emphasis on high-performance scientific
computing.

Miscellaneous Information: