Petascale machines with hundreds of thousands of cores are being built. These machines have varying interconnect topologies and large network diameters. Computation is cheap and communication on the network is becoming the bottleneck for scaling of parallel applications. Network contention, specifically, is becoming an increasingly important factor affecting overall performance. Most parallel applications have a certain communication topology. Mapping of tasks in a parallel application based on their communication graph, to the physical processors on a machine can potentially lead to performance improvements. Placement of communicating tasks on nearby physical processors can minimize the distance traveled by messages and reduce the chances of contention.

Performance improvements through topology aware placement for applications such as NAMD and OpenAtom are used to motivate this work. Building on these ideas, I will present algorithms and techniques for automatic mapping of parallel applications to relieve the application developers of this burden. The hop-bytes metric is proposed for the evaluation of mapping algorithms as a better metric than the previously used maximum dilation metric. The main focus of this work is on developing topology aware mapping algorithms for parallel applications with regular and irregular communication patterns. The automatic mapping framework is a suite of such algorithms with capabilities to choose the best mapping for a problem with a given communication graph. More details on my research available at: http://charm.cs.illinois.edu/~bhatele/phd/

Bio:
Abhinav received a B. Tech. degree in Computer Science and Engineering from I.I.T. Kanpur (INDIA) in May 2005 and M. S. and Ph. D. degrees in Computer Science from the University of Illinois at Urbana-Champaign in 2007 and 2010 respectively. He is a post doctoral research associate working with Professors Kale and Gropp at Illinois. His research is centered around topology aware mapping and load balancing for parallel applications. He is also interested in performance analysis and optimization of parallel applications and studying algorithmic feasibility to exascale. Abhinav is an ACM/IEEE George Michael HPC Fellow (2009). He received the David J. Kuck Outstanding MS Thesis Award in 2009, a Distinguished Paper Award at Euro-Par 2009 for his mapping work and the David J. Kuck Outstanding PhD Thesis Award for 2011.