FPGA-based Data-Flow Computing for Tsunami Simulation

Event Sponsor: 
Mathmatics and Computer Science Division Seminar
Start Date: 
Aug 23 2018 - 11:00am
Building/Room: 
Building 240/Room 4301
Location: 
Argonne National Laboratory
Speaker(s): 
Kentaro Sano
Speaker(s) Title: 
Advanced Institute of Computer Science, Riken
Host: 
Kazutomo Yoshii

Data-flow computing with FPGAs (Field-Programmable Gate Arrays) is promising to further scale computational performance after performance improvement by multi-core scaling becomes difficult. In our laboratory, we have developed a system with FPGAs and a data-flow compiler which generates a pipelined custom hardware module to be embedded onto an FPGA and executed as stream computing.

In this talk, I talk about the system, the data-flow compiler, and the case study of FPGA-based Tsunami Simulation, following recent trend of FPGA's application for high-performance computing, in addition to recent updates using Intel's OPAE.