HPC Activities at C-DAC, India: An overview

Yogeshwar Sonawane
Seminar

This talk will introduce the audience to HPC activities at Center for Development of Advanced Computing (C-DAC) and will focus on systems developed in Hardware Technology Development group (HTDG). Indigenously built High Performance Cluster Interconnect, Reconfigurable Computing Systems and the associated System Software will be discussed. Additionally it will provide configuration details of PARAM Yuva, a 54TF cluster housed at National PARAM Supercomputing Facility (NPSF) in Pune, India.

Bio:
Mr. Yogeshwar Sonawane is working as a Member Technical Staff (MTS) with Hardware Technology Development Group (HTDG) of Center for Development of Advanced Computing (C-DAC) at Pune, India since 2004. He is associated with System Software development in the areas of High Performance Interconnect for Cluster Computing and Reconfigurable Computing Systems. His chief expertise lies in development of light weight communication stacks for RDMA capable interconnects and software interfaces for Reconfigurable Computing hardware. His research interests include High Speed Networking Systems, efficient protocol stacks, MPI Scalability and Embedded Systems. Yogeshwar has a Bachelor of Engineering (B.E.) degree in Electronics & Telecommunications from Govt. College of Engineering, Pune, India.