The memory wall has long been identified as a major and persistent bottleneck for computing systems. Consequently, the complexity of the memory subsystem in high-performance computing (HPC) nodes has dramatically increased as a way to keep pushing performance further. Contemporary HPC nodes embed heterogeneous computing units with on-die and nodewide interconnection networks, as well as multiple memory technologies. The DOE report[1] on pre-exascale systems and the Top500 data show that the trend of increasing node complexity and NUMA effects is still alive. Therefore, in order to achieve good performance, an efficient mapping of data and computations on compute nodes is critical. 

The first challenge in tackling this problem is to characterize machines and application performance with respect to how the latter is mapped onto the former. In this seminar I will present my work on characterizing machines and applications performance with my locality-aware roofline model. Since the space of possible mappings of data in memories and computations on computational units cannot be explored in a reasonable time, a second challenge is to find heuristics and strategies to map applications efficiently. Therefore, the second contribution I will present focuses on applying machine learning techniques to predict the best placement heuristics on new applications and (incrementally) new architectures. With the diversity of technologies and APIs, a third challenge is to bring the described information to the application level in a portable manner while abstracting the underlying machines and strategies complexity. To this end I will introduce AML, a portable memory management library, and will describe how my work has enabled it to accelerate applications through efficient data mapping.

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